1. Technical Field
The present invention relates to a microwave output amplifier stage used for signal pulse pattern generators, including a traditional pulse generator, a square wave generator, or a sine wave generator. More particularly, the present invention relates to such an amplifier output stage that allows a linear amplification from DC to microwave frequencies with provisions for applying DC offset input and output signals to the amplifier stage.
2. Related Art
FIG. 1 shows a conventional amplifier for generating pulse patterns with DC bias supplied to the output amplifier 2 using a DC bias adjustment circuit 4. The output amplifier 2 for a pulse generator typically are connected to a pseudo ground, as shown, allowing the pulse pattern output of the amplifier 2 to be varied around ground potential using bias circuit 4. A pulse signal generator input stage 6 provides an input to the amplifier 2 of the output stage through a standard Rs=50 Ohm line 8. The input IN can have a DC offset as shown in FIG. 2A. The input IN is then AC coupled by a blocking capacitor 10 to provide only an AC signal to the input of amplifier 2. As shown in FIG. 2B, the capacitor 10 has removed any offset at the input of amplifier 2. The DC bias adjustment circuit 4 then controls the output of amplifier 2 so that the output OUT is DC coupled by controlling the pseudo ground of amplifier 2. As illustrated in FIG. 2C, with the pseudo ground adjustment, the DC bias is reintroduced to the signal at the amplifier input. The input IN is, thus, AC coupled while the output OUT is DC coupled to drive a load 12 shown having a standard Rs=50 Ohm impedance. With the circuit of FIG. 1, the user defined DC output bias potential from bias circuit 4, above or below ground, must be supplied by directly controlling the pseudo ground of amplifier 2.
FIG. 3 shows an alternative to the circuit of FIG. 1 for a conventional amplifier output stage for generating pulse patterns. FIG. 3 is modified by having the DC bias supplied from bias circuit 4 to a Bias T circuit 16 following the output of amplifier 2. In FIG. 3, the input to amplifier 2 is AC coupled from the input stage signal IN using blocking capacitor 10. Thus, at the input IN, the signal can be the same as shown in FIG. 2A, while the input to amplifier 2 is the same as illustrated in FIG. 2B. With the Bias T 16, while the DC bias voltage offset passes through an inductor 18 and is added in at the output OUT from amplifier 20. Thus, the output of the Bias T network 16 will have a signal as illustrated in FIG. 2C. This technique, however, now has DC blocking capacitors 10 and 20 at the input and output ports, allowing low frequency components of the pulse pattern to be susceptible to DC modulation.
It is desirable to provide a DC offset bias in an output amplifier for generating pulse patterns without requiring modification to the amplifier ground connection, or modification to affect low frequency components of the AC signal.